PotatoSemi GHz TTL Logic- Clock Buffer

Regular Clock Buffer

Advantage
1. Easy to use.
2. Clock source is from crystal oscillator.
3. Only need decupling capacitor. No extra component is needed.
4. No static current.

Disadvantage
1. High Noise.
2. Low operating frequency.
3. Large Propagation Delay.
3. High jitter.
4. Week output signal.
5. Signal is not able to run through cable.


Zero Delay Clock Buffer

Advantage
1. Zero Delay.

Disadvantage
1. Shift clock source from crystal oscillator to PLL local oscillator.
2. High Noise.
3. Low operating frequency.
4. High jitter.
5. Week output signal.
6. Signal is not able to run through cable.


ECL Clock buffer

Advantage
1. Small propagation delay.
2. Clock source is from crystal oscillator.
3. Run high frequency.
4. Low noise.
5. Low jitter.
6. Can run through cable.

Disadvantage
1. Difficult to use.
2. Need many extra components such as 50 ohm loading resistors.
3. Need two wires to represent one bit.
5. Waste PCB space.
5. Current source design. High static current.
6. Burn electricity power when the system is idle. Waste energy.

The Next Generation GHz CMOS Clock Buffer (PotatoSemi Clock Buffer)

Advantage
1. Small propagation delay.
2. Clock source is from crystal oscillator.
3. Strong output signal.
4. Run high frequency.
5. Low noise.
6. Low jitter.
7. Can run through cable.
8. Only one wire for one bit.
9. Easy to use.
10. Embedded decupling capacitor.
11. Power up and run. No extra component is needed.
12. Voltage source design. No static current.
13. Do not waste power. Power saving. Environment friendly.